
25AA640/25LC640
FIGURE 1-1:
CS
HOLD TIMING
1 6
17
16
17
SCK
18
19
SO
n+2
n+1
n
High-Impedance
n
n-1
Don’t Care
5
SI
n+2
n+1
n
n
n-1
HOLD
FIGURE 1-2:
SERIAL INPUT TIMING
4
CS
2
Mode 1 , 1
7
8
3
11
12
SCK Mode 0 , 0
5
6
SI
SO
FIGURE 1-3:
CS
MSB In
High-Impedance
SERIAL OUTPUT TIMING
LSB In
SCK
9
10
3
Mode 1 , 1
Mode 0 , 0
13
14
15
SO
SI
DS21223H-page 4
MSB Out
Don’t Care
LSB Out
? 2008 Microchip Technology Inc.